Fundamentals of Gallium Nitride Power Transistors

Structure A device’s cost effectiveness starts with leveraging existing production infrastructure. EPC’s process begins with silicon wafers. Utiilizing existing silicon processing equipment, a thin layer of Aluminum Nitride (AlN) is grown on the Silicon to isolate the device structure from the Substrate. The isolation layer for 200 V and below devices is 300 V. On top of this, a thick layer of highly resistive Gallium Nitride is grown. This layer provides a foundation on which to build the GaN transistor. An electron generating material is applied to the GaN. This layer creates a GaN layer with an abundance of electrons just below it that is highly conductive. Further processing forms a depletion region under the gate. To enhance the transistor, a positive voltage is applied to the gate in the same manner as turning on an n-channel, enhancement mode power MOSFET. A cross section of this structure is depicted in figure 1. This structure is repeated many times to form a power device. The end result is a fundamentally simple, elegant, cost effective solution for power switching. This device behaves similarly to Silicon MOSFETs with some exceptions that will be explained in the following sections. Operation EPC’s GaN transistors behave very similarly to Silicon Power MOSFETs. A positive bias on the gate relative to the source causes a field effect which attracts electrons that complete a bidirectional channel between the drain and the source. Since the electrons are pooled, as opposed to being loosely trapped in a lattice, the resistance of this channel is quite low. When the bias is removed from the gate, the electrons under it are dispersed into the GaN, recreating the depletion region, and once again, giving it the capability to block voltage. Fundamentals of Gallium Nitride Power Transistors